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<div class="header">
  <div class="headertitle"><div class="title">stm32h7xx_ll_crs.h</div></div>
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<a href="stm32h7xx__ll__crs_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span></div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno">   18</span> </div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno">   19</span><span class="comment">/* Define to prevent recursive inclusion -------------------------------------*/</span></div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno">   20</span><span class="preprocessor">#ifndef STM32H7xx_LL_CRS_H</span></div>
<div class="line"><a id="l00021" name="l00021"></a><span class="lineno">   21</span><span class="preprocessor">#define STM32H7xx_LL_CRS_H</span></div>
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno">   22</span> </div>
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno">   23</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno">   24</span><span class="keyword">extern</span> <span class="stringliteral">&quot;C&quot;</span> {</div>
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno">   25</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno">   26</span> </div>
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno">   27</span><span class="comment">/* Includes ------------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00028" name="l00028"></a><span class="lineno">   28</span><span class="preprocessor">#include &quot;<a class="code" href="stm32h7xx_8h.html">stm32h7xx.h</a>&quot;</span></div>
<div class="line"><a id="l00029" name="l00029"></a><span class="lineno">   29</span></div>
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno">   33</span> </div>
<div class="line"><a id="l00034" name="l00034"></a><span class="lineno">   34</span><span class="preprocessor">#if defined(CRS)</span></div>
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno">   35</span></div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno">   39</span> </div>
<div class="line"><a id="l00040" name="l00040"></a><span class="lineno">   40</span><span class="comment">/* Private types -------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00041" name="l00041"></a><span class="lineno">   41</span><span class="comment">/* Private variables ---------------------------------------------------------*/</span></div>
<div class="line"><a id="l00042" name="l00042"></a><span class="lineno">   42</span><span class="comment">/* Private constants ---------------------------------------------------------*/</span></div>
<div class="line"><a id="l00043" name="l00043"></a><span class="lineno">   43</span><span class="comment">/* Private macros ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00044" name="l00044"></a><span class="lineno">   44</span> </div>
<div class="line"><a id="l00045" name="l00045"></a><span class="lineno">   45</span><span class="comment">/* Exported types ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00046" name="l00046"></a><span class="lineno">   46</span><span class="comment">/* Exported constants --------------------------------------------------------*/</span></div>
<div class="line"><a id="l00050" name="l00050"></a><span class="lineno">   50</span></div>
<div class="line"><a id="l00055" name="l00055"></a><span class="lineno">   55</span><span class="preprocessor">#define LL_CRS_ISR_SYNCOKF                 CRS_ISR_SYNCOKF</span></div>
<div class="line"><a id="l00056" name="l00056"></a><span class="lineno">   56</span><span class="preprocessor">#define LL_CRS_ISR_SYNCWARNF               CRS_ISR_SYNCWARNF</span></div>
<div class="line"><a id="l00057" name="l00057"></a><span class="lineno">   57</span><span class="preprocessor">#define LL_CRS_ISR_ERRF                    CRS_ISR_ERRF</span></div>
<div class="line"><a id="l00058" name="l00058"></a><span class="lineno">   58</span><span class="preprocessor">#define LL_CRS_ISR_ESYNCF                  CRS_ISR_ESYNCF</span></div>
<div class="line"><a id="l00059" name="l00059"></a><span class="lineno">   59</span><span class="preprocessor">#define LL_CRS_ISR_SYNCERR                 CRS_ISR_SYNCERR</span></div>
<div class="line"><a id="l00060" name="l00060"></a><span class="lineno">   60</span><span class="preprocessor">#define LL_CRS_ISR_SYNCMISS                CRS_ISR_SYNCMISS</span></div>
<div class="line"><a id="l00061" name="l00061"></a><span class="lineno">   61</span><span class="preprocessor">#define LL_CRS_ISR_TRIMOVF                 CRS_ISR_TRIMOVF</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00065" name="l00065"></a><span class="lineno">   65</span></div>
<div class="line"><a id="l00070" name="l00070"></a><span class="lineno">   70</span><span class="preprocessor">#define LL_CRS_CR_SYNCOKIE                 CRS_CR_SYNCOKIE</span></div>
<div class="line"><a id="l00071" name="l00071"></a><span class="lineno">   71</span><span class="preprocessor">#define LL_CRS_CR_SYNCWARNIE               CRS_CR_SYNCWARNIE</span></div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno">   72</span><span class="preprocessor">#define LL_CRS_CR_ERRIE                    CRS_CR_ERRIE</span></div>
<div class="line"><a id="l00073" name="l00073"></a><span class="lineno">   73</span><span class="preprocessor">#define LL_CRS_CR_ESYNCIE                  CRS_CR_ESYNCIE</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00077" name="l00077"></a><span class="lineno">   77</span></div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno">   81</span><span class="preprocessor">#define LL_CRS_SYNC_DIV_1                  0x00000000U                               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno">   82</span><span class="preprocessor">#define LL_CRS_SYNC_DIV_2                  CRS_CFGR_SYNCDIV_0                        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno">   83</span><span class="preprocessor">#define LL_CRS_SYNC_DIV_4                  CRS_CFGR_SYNCDIV_1                        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno">   84</span><span class="preprocessor">#define LL_CRS_SYNC_DIV_8                  (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00085" name="l00085"></a><span class="lineno">   85</span><span class="preprocessor">#define LL_CRS_SYNC_DIV_16                 CRS_CFGR_SYNCDIV_2                        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno">   86</span><span class="preprocessor">#define LL_CRS_SYNC_DIV_32                 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00087" name="l00087"></a><span class="lineno">   87</span><span class="preprocessor">#define LL_CRS_SYNC_DIV_64                 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno">   88</span><span class="preprocessor">#define LL_CRS_SYNC_DIV_128                CRS_CFGR_SYNCDIV                          </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00092" name="l00092"></a><span class="lineno">   92</span></div>
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno">   96</span><span class="preprocessor">#define LL_CRS_SYNC_SOURCE_GPIO            0x00000000U             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno">   97</span><span class="preprocessor">#define LL_CRS_SYNC_SOURCE_LSE             CRS_CFGR_SYNCSRC_0      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno">   98</span><span class="preprocessor">#define LL_CRS_SYNC_SOURCE_USB             CRS_CFGR_SYNCSRC_1      </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno">  102</span></div>
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno">  106</span><span class="preprocessor">#define LL_CRS_SYNC_POLARITY_RISING        0x00000000U           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno">  107</span><span class="preprocessor">#define LL_CRS_SYNC_POLARITY_FALLING       CRS_CFGR_SYNCPOL      </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno">  111</span></div>
<div class="line"><a id="l00115" name="l00115"></a><span class="lineno">  115</span><span class="preprocessor">#define LL_CRS_FREQ_ERROR_DIR_UP           0x00000000U         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00116" name="l00116"></a><span class="lineno">  116</span><span class="preprocessor">#define LL_CRS_FREQ_ERROR_DIR_DOWN         CRS_ISR_FEDIR       </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00120" name="l00120"></a><span class="lineno">  120</span></div>
<div class="line"><a id="l00129" name="l00129"></a><span class="lineno">  129</span><span class="preprocessor">#define LL_CRS_RELOADVALUE_DEFAULT         0x0000BB7FU</span></div>
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno">  130</span></div>
<div class="line"><a id="l00134" name="l00134"></a><span class="lineno">  134</span><span class="preprocessor">#define LL_CRS_ERRORLIMIT_DEFAULT          0x00000022U</span></div>
<div class="line"><a id="l00135" name="l00135"></a><span class="lineno">  135</span></div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno">  142</span><span class="preprocessor">#define LL_CRS_HSI48CALIBRATION_DEFAULT    0x00000020U</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno">  146</span></div>
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno">  150</span> </div>
<div class="line"><a id="l00151" name="l00151"></a><span class="lineno">  151</span><span class="comment">/* Exported macro ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00155" name="l00155"></a><span class="lineno">  155</span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno">  159</span></div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno">  167</span><span class="preprocessor">#define LL_CRS_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__-&gt;__REG__, (__VALUE__))</span></div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno">  168</span></div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno">  175</span><span class="preprocessor">#define LL_CRS_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__-&gt;__REG__)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno">  179</span></div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno">  183</span></div>
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno">  195</span><span class="preprocessor">#define __LL_CRS_CALC_CALCULATE_RELOADVALUE(__FTARGET__, __FSYNC__) (((__FTARGET__) / (__FSYNC__)) - 1U)</span></div>
<div class="line"><a id="l00196" name="l00196"></a><span class="lineno">  196</span></div>
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno">  200</span></div>
<div class="line"><a id="l00204" name="l00204"></a><span class="lineno">  204</span> </div>
<div class="line"><a id="l00205" name="l00205"></a><span class="lineno">  205</span><span class="comment">/* Exported functions --------------------------------------------------------*/</span></div>
<div class="line"><a id="l00209" name="l00209"></a><span class="lineno">  209</span></div>
<div class="line"><a id="l00213" name="l00213"></a><span class="lineno">  213</span></div>
<div class="line"><a id="l00220" name="l00220"></a><span class="lineno">  220</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_EnableFreqErrorCounter(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00221" name="l00221"></a><span class="lineno">  221</span>{</div>
<div class="line"><a id="l00222" name="l00222"></a><span class="lineno">  222</span>  SET_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gace21476d647129c935f84daf84d91699">CRS_CR_CEN</a>);</div>
<div class="line"><a id="l00223" name="l00223"></a><span class="lineno">  223</span>}</div>
<div class="line"><a id="l00224" name="l00224"></a><span class="lineno">  224</span></div>
<div class="line"><a id="l00230" name="l00230"></a><span class="lineno">  230</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_DisableFreqErrorCounter(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00231" name="l00231"></a><span class="lineno">  231</span>{</div>
<div class="line"><a id="l00232" name="l00232"></a><span class="lineno">  232</span>  CLEAR_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gace21476d647129c935f84daf84d91699">CRS_CR_CEN</a>);</div>
<div class="line"><a id="l00233" name="l00233"></a><span class="lineno">  233</span>}</div>
<div class="line"><a id="l00234" name="l00234"></a><span class="lineno">  234</span></div>
<div class="line"><a id="l00240" name="l00240"></a><span class="lineno">  240</span>__STATIC_INLINE uint32_t LL_CRS_IsEnabledFreqErrorCounter(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00241" name="l00241"></a><span class="lineno">  241</span>{</div>
<div class="line"><a id="l00242" name="l00242"></a><span class="lineno">  242</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gace21476d647129c935f84daf84d91699">CRS_CR_CEN</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gace21476d647129c935f84daf84d91699">CRS_CR_CEN</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00243" name="l00243"></a><span class="lineno">  243</span>}</div>
<div class="line"><a id="l00244" name="l00244"></a><span class="lineno">  244</span></div>
<div class="line"><a id="l00250" name="l00250"></a><span class="lineno">  250</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_EnableAutoTrimming(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00251" name="l00251"></a><span class="lineno">  251</span>{</div>
<div class="line"><a id="l00252" name="l00252"></a><span class="lineno">  252</span>  SET_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gafa48432b942f1896e05a2eff91178edd">CRS_CR_AUTOTRIMEN</a>);</div>
<div class="line"><a id="l00253" name="l00253"></a><span class="lineno">  253</span>}</div>
<div class="line"><a id="l00254" name="l00254"></a><span class="lineno">  254</span></div>
<div class="line"><a id="l00260" name="l00260"></a><span class="lineno">  260</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_DisableAutoTrimming(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00261" name="l00261"></a><span class="lineno">  261</span>{</div>
<div class="line"><a id="l00262" name="l00262"></a><span class="lineno">  262</span>  CLEAR_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gafa48432b942f1896e05a2eff91178edd">CRS_CR_AUTOTRIMEN</a>);</div>
<div class="line"><a id="l00263" name="l00263"></a><span class="lineno">  263</span>}</div>
<div class="line"><a id="l00264" name="l00264"></a><span class="lineno">  264</span></div>
<div class="line"><a id="l00270" name="l00270"></a><span class="lineno">  270</span>__STATIC_INLINE uint32_t LL_CRS_IsEnabledAutoTrimming(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00271" name="l00271"></a><span class="lineno">  271</span>{</div>
<div class="line"><a id="l00272" name="l00272"></a><span class="lineno">  272</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gafa48432b942f1896e05a2eff91178edd">CRS_CR_AUTOTRIMEN</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gafa48432b942f1896e05a2eff91178edd">CRS_CR_AUTOTRIMEN</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00273" name="l00273"></a><span class="lineno">  273</span>}</div>
<div class="line"><a id="l00274" name="l00274"></a><span class="lineno">  274</span></div>
<div class="line"><a id="l00283" name="l00283"></a><span class="lineno">  283</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_SetHSI48SmoothTrimming(uint32_t Value)</div>
<div class="line"><a id="l00284" name="l00284"></a><span class="lineno">  284</span>{</div>
<div class="line"><a id="l00285" name="l00285"></a><span class="lineno">  285</span>  MODIFY_REG(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga755d695431db14c1b3b15a48ede61c13">CRS_CR_TRIM</a>, Value &lt;&lt; CRS_CR_TRIM_Pos);</div>
<div class="line"><a id="l00286" name="l00286"></a><span class="lineno">  286</span>}</div>
<div class="line"><a id="l00287" name="l00287"></a><span class="lineno">  287</span></div>
<div class="line"><a id="l00293" name="l00293"></a><span class="lineno">  293</span>__STATIC_INLINE uint32_t LL_CRS_GetHSI48SmoothTrimming(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00294" name="l00294"></a><span class="lineno">  294</span>{</div>
<div class="line"><a id="l00295" name="l00295"></a><span class="lineno">  295</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga755d695431db14c1b3b15a48ede61c13">CRS_CR_TRIM</a>) &gt;&gt; CRS_CR_TRIM_Pos);</div>
<div class="line"><a id="l00296" name="l00296"></a><span class="lineno">  296</span>}</div>
<div class="line"><a id="l00297" name="l00297"></a><span class="lineno">  297</span></div>
<div class="line"><a id="l00306" name="l00306"></a><span class="lineno">  306</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_SetReloadCounter(uint32_t Value)</div>
<div class="line"><a id="l00307" name="l00307"></a><span class="lineno">  307</span>{</div>
<div class="line"><a id="l00308" name="l00308"></a><span class="lineno">  308</span>  MODIFY_REG(CRS-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga7e54b011ada0eeb4b6ed9cdd24d517f9">CRS_CFGR_RELOAD</a>, Value);</div>
<div class="line"><a id="l00309" name="l00309"></a><span class="lineno">  309</span>}</div>
<div class="line"><a id="l00310" name="l00310"></a><span class="lineno">  310</span></div>
<div class="line"><a id="l00316" name="l00316"></a><span class="lineno">  316</span>__STATIC_INLINE uint32_t LL_CRS_GetReloadCounter(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00317" name="l00317"></a><span class="lineno">  317</span>{</div>
<div class="line"><a id="l00318" name="l00318"></a><span class="lineno">  318</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(CRS-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga7e54b011ada0eeb4b6ed9cdd24d517f9">CRS_CFGR_RELOAD</a>));</div>
<div class="line"><a id="l00319" name="l00319"></a><span class="lineno">  319</span>}</div>
<div class="line"><a id="l00320" name="l00320"></a><span class="lineno">  320</span></div>
<div class="line"><a id="l00328" name="l00328"></a><span class="lineno">  328</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_SetFreqErrorLimit(uint32_t Value)</div>
<div class="line"><a id="l00329" name="l00329"></a><span class="lineno">  329</span>{</div>
<div class="line"><a id="l00330" name="l00330"></a><span class="lineno">  330</span>  MODIFY_REG(CRS-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga48c70ae21b6a35ed520a2b30df2c4852">CRS_CFGR_FELIM</a>, Value &lt;&lt; CRS_CFGR_FELIM_Pos);</div>
<div class="line"><a id="l00331" name="l00331"></a><span class="lineno">  331</span>}</div>
<div class="line"><a id="l00332" name="l00332"></a><span class="lineno">  332</span></div>
<div class="line"><a id="l00338" name="l00338"></a><span class="lineno">  338</span>__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorLimit(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00339" name="l00339"></a><span class="lineno">  339</span>{</div>
<div class="line"><a id="l00340" name="l00340"></a><span class="lineno">  340</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(CRS-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga48c70ae21b6a35ed520a2b30df2c4852">CRS_CFGR_FELIM</a>) &gt;&gt; CRS_CFGR_FELIM_Pos);</div>
<div class="line"><a id="l00341" name="l00341"></a><span class="lineno">  341</span>}</div>
<div class="line"><a id="l00342" name="l00342"></a><span class="lineno">  342</span></div>
<div class="line"><a id="l00357" name="l00357"></a><span class="lineno">  357</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_SetSyncDivider(uint32_t Divider)</div>
<div class="line"><a id="l00358" name="l00358"></a><span class="lineno">  358</span>{</div>
<div class="line"><a id="l00359" name="l00359"></a><span class="lineno">  359</span>  MODIFY_REG(CRS-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gad0b3ee2ab042802997e57d788c640647">CRS_CFGR_SYNCDIV</a>, Divider);</div>
<div class="line"><a id="l00360" name="l00360"></a><span class="lineno">  360</span>}</div>
<div class="line"><a id="l00361" name="l00361"></a><span class="lineno">  361</span></div>
<div class="line"><a id="l00375" name="l00375"></a><span class="lineno">  375</span>__STATIC_INLINE uint32_t LL_CRS_GetSyncDivider(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00376" name="l00376"></a><span class="lineno">  376</span>{</div>
<div class="line"><a id="l00377" name="l00377"></a><span class="lineno">  377</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(CRS-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gad0b3ee2ab042802997e57d788c640647">CRS_CFGR_SYNCDIV</a>));</div>
<div class="line"><a id="l00378" name="l00378"></a><span class="lineno">  378</span>}</div>
<div class="line"><a id="l00379" name="l00379"></a><span class="lineno">  379</span></div>
<div class="line"><a id="l00389" name="l00389"></a><span class="lineno">  389</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_SetSyncSignalSource(uint32_t Source)</div>
<div class="line"><a id="l00390" name="l00390"></a><span class="lineno">  390</span>{</div>
<div class="line"><a id="l00391" name="l00391"></a><span class="lineno">  391</span>  MODIFY_REG(CRS-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga441881d5e657b04236e440918fe63d20">CRS_CFGR_SYNCSRC</a>, Source);</div>
<div class="line"><a id="l00392" name="l00392"></a><span class="lineno">  392</span>}</div>
<div class="line"><a id="l00393" name="l00393"></a><span class="lineno">  393</span></div>
<div class="line"><a id="l00402" name="l00402"></a><span class="lineno">  402</span>__STATIC_INLINE uint32_t LL_CRS_GetSyncSignalSource(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00403" name="l00403"></a><span class="lineno">  403</span>{</div>
<div class="line"><a id="l00404" name="l00404"></a><span class="lineno">  404</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(CRS-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga441881d5e657b04236e440918fe63d20">CRS_CFGR_SYNCSRC</a>));</div>
<div class="line"><a id="l00405" name="l00405"></a><span class="lineno">  405</span>}</div>
<div class="line"><a id="l00406" name="l00406"></a><span class="lineno">  406</span></div>
<div class="line"><a id="l00415" name="l00415"></a><span class="lineno">  415</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_SetSyncPolarity(uint32_t Polarity)</div>
<div class="line"><a id="l00416" name="l00416"></a><span class="lineno">  416</span>{</div>
<div class="line"><a id="l00417" name="l00417"></a><span class="lineno">  417</span>  MODIFY_REG(CRS-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gab28395cefb0927f2118a9a840a2e2d71">CRS_CFGR_SYNCPOL</a>, Polarity);</div>
<div class="line"><a id="l00418" name="l00418"></a><span class="lineno">  418</span>}</div>
<div class="line"><a id="l00419" name="l00419"></a><span class="lineno">  419</span></div>
<div class="line"><a id="l00427" name="l00427"></a><span class="lineno">  427</span>__STATIC_INLINE uint32_t LL_CRS_GetSyncPolarity(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00428" name="l00428"></a><span class="lineno">  428</span>{</div>
<div class="line"><a id="l00429" name="l00429"></a><span class="lineno">  429</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(CRS-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gab28395cefb0927f2118a9a840a2e2d71">CRS_CFGR_SYNCPOL</a>));</div>
<div class="line"><a id="l00430" name="l00430"></a><span class="lineno">  430</span>}</div>
<div class="line"><a id="l00431" name="l00431"></a><span class="lineno">  431</span></div>
<div class="line"><a id="l00450" name="l00450"></a><span class="lineno">  450</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_ConfigSynchronization(uint32_t HSI48CalibrationValue, uint32_t ErrorLimitValue, uint32_t ReloadValue, uint32_t Settings)</div>
<div class="line"><a id="l00451" name="l00451"></a><span class="lineno">  451</span>{</div>
<div class="line"><a id="l00452" name="l00452"></a><span class="lineno">  452</span>  MODIFY_REG(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga755d695431db14c1b3b15a48ede61c13">CRS_CR_TRIM</a>, HSI48CalibrationValue);</div>
<div class="line"><a id="l00453" name="l00453"></a><span class="lineno">  453</span>  MODIFY_REG(CRS-&gt;CFGR,</div>
<div class="line"><a id="l00454" name="l00454"></a><span class="lineno">  454</span>             <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga7e54b011ada0eeb4b6ed9cdd24d517f9">CRS_CFGR_RELOAD</a> | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga48c70ae21b6a35ed520a2b30df2c4852">CRS_CFGR_FELIM</a> | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gad0b3ee2ab042802997e57d788c640647">CRS_CFGR_SYNCDIV</a> | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga441881d5e657b04236e440918fe63d20">CRS_CFGR_SYNCSRC</a> | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gab28395cefb0927f2118a9a840a2e2d71">CRS_CFGR_SYNCPOL</a>,</div>
<div class="line"><a id="l00455" name="l00455"></a><span class="lineno">  455</span>             ReloadValue | (ErrorLimitValue &lt;&lt; CRS_CFGR_FELIM_Pos) | Settings);</div>
<div class="line"><a id="l00456" name="l00456"></a><span class="lineno">  456</span>}</div>
<div class="line"><a id="l00457" name="l00457"></a><span class="lineno">  457</span></div>
<div class="line"><a id="l00461" name="l00461"></a><span class="lineno">  461</span></div>
<div class="line"><a id="l00465" name="l00465"></a><span class="lineno">  465</span></div>
<div class="line"><a id="l00471" name="l00471"></a><span class="lineno">  471</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_GenerateEvent_SWSYNC(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00472" name="l00472"></a><span class="lineno">  472</span>{</div>
<div class="line"><a id="l00473" name="l00473"></a><span class="lineno">  473</span>  SET_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga53d79706214ba4ee9310e4b678d67e44">CRS_CR_SWSYNC</a>);</div>
<div class="line"><a id="l00474" name="l00474"></a><span class="lineno">  474</span>}</div>
<div class="line"><a id="l00475" name="l00475"></a><span class="lineno">  475</span></div>
<div class="line"><a id="l00484" name="l00484"></a><span class="lineno">  484</span>__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorDirection(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00485" name="l00485"></a><span class="lineno">  485</span>{</div>
<div class="line"><a id="l00486" name="l00486"></a><span class="lineno">  486</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(CRS-&gt;ISR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga91196b059d8ff52c4f28bc964c8a446a">CRS_ISR_FEDIR</a>));</div>
<div class="line"><a id="l00487" name="l00487"></a><span class="lineno">  487</span>}</div>
<div class="line"><a id="l00488" name="l00488"></a><span class="lineno">  488</span></div>
<div class="line"><a id="l00494" name="l00494"></a><span class="lineno">  494</span>__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorCapture(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00495" name="l00495"></a><span class="lineno">  495</span>{</div>
<div class="line"><a id="l00496" name="l00496"></a><span class="lineno">  496</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(CRS-&gt;ISR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaf0b8a9757678f28814b1a0c1baca63e2">CRS_ISR_FECAP</a>) &gt;&gt; CRS_ISR_FECAP_Pos);</div>
<div class="line"><a id="l00497" name="l00497"></a><span class="lineno">  497</span>}</div>
<div class="line"><a id="l00498" name="l00498"></a><span class="lineno">  498</span></div>
<div class="line"><a id="l00502" name="l00502"></a><span class="lineno">  502</span></div>
<div class="line"><a id="l00506" name="l00506"></a><span class="lineno">  506</span></div>
<div class="line"><a id="l00512" name="l00512"></a><span class="lineno">  512</span>__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCOK(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00513" name="l00513"></a><span class="lineno">  513</span>{</div>
<div class="line"><a id="l00514" name="l00514"></a><span class="lineno">  514</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;ISR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gae0a9b5f8992ead0ad76fbb08a5e32419">CRS_ISR_SYNCOKF</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gae0a9b5f8992ead0ad76fbb08a5e32419">CRS_ISR_SYNCOKF</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00515" name="l00515"></a><span class="lineno">  515</span>}</div>
<div class="line"><a id="l00516" name="l00516"></a><span class="lineno">  516</span></div>
<div class="line"><a id="l00522" name="l00522"></a><span class="lineno">  522</span>__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCWARN(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00523" name="l00523"></a><span class="lineno">  523</span>{</div>
<div class="line"><a id="l00524" name="l00524"></a><span class="lineno">  524</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;ISR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga0f33a79fec47400ab363bbf5b4b9f2b5">CRS_ISR_SYNCWARNF</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga0f33a79fec47400ab363bbf5b4b9f2b5">CRS_ISR_SYNCWARNF</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00525" name="l00525"></a><span class="lineno">  525</span>}</div>
<div class="line"><a id="l00526" name="l00526"></a><span class="lineno">  526</span></div>
<div class="line"><a id="l00532" name="l00532"></a><span class="lineno">  532</span>__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ERR(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00533" name="l00533"></a><span class="lineno">  533</span>{</div>
<div class="line"><a id="l00534" name="l00534"></a><span class="lineno">  534</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;ISR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga963b451a4ca8890ee3d323304f0b9298">CRS_ISR_ERRF</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga963b451a4ca8890ee3d323304f0b9298">CRS_ISR_ERRF</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00535" name="l00535"></a><span class="lineno">  535</span>}</div>
<div class="line"><a id="l00536" name="l00536"></a><span class="lineno">  536</span></div>
<div class="line"><a id="l00542" name="l00542"></a><span class="lineno">  542</span>__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ESYNC(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00543" name="l00543"></a><span class="lineno">  543</span>{</div>
<div class="line"><a id="l00544" name="l00544"></a><span class="lineno">  544</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;ISR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga819c4d424be7915f9660ecb19c234a8f">CRS_ISR_ESYNCF</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga819c4d424be7915f9660ecb19c234a8f">CRS_ISR_ESYNCF</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00545" name="l00545"></a><span class="lineno">  545</span>}</div>
<div class="line"><a id="l00546" name="l00546"></a><span class="lineno">  546</span></div>
<div class="line"><a id="l00552" name="l00552"></a><span class="lineno">  552</span>__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCERR(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00553" name="l00553"></a><span class="lineno">  553</span>{</div>
<div class="line"><a id="l00554" name="l00554"></a><span class="lineno">  554</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;ISR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga80d05ae1142788a65444c0463a26bcfb">CRS_ISR_SYNCERR</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga80d05ae1142788a65444c0463a26bcfb">CRS_ISR_SYNCERR</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00555" name="l00555"></a><span class="lineno">  555</span>}</div>
<div class="line"><a id="l00556" name="l00556"></a><span class="lineno">  556</span></div>
<div class="line"><a id="l00562" name="l00562"></a><span class="lineno">  562</span>__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCMISS(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00563" name="l00563"></a><span class="lineno">  563</span>{</div>
<div class="line"><a id="l00564" name="l00564"></a><span class="lineno">  564</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;ISR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga9f2241bd51b436f7b381ad410124aec5">CRS_ISR_SYNCMISS</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga9f2241bd51b436f7b381ad410124aec5">CRS_ISR_SYNCMISS</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00565" name="l00565"></a><span class="lineno">  565</span>}</div>
<div class="line"><a id="l00566" name="l00566"></a><span class="lineno">  566</span></div>
<div class="line"><a id="l00572" name="l00572"></a><span class="lineno">  572</span>__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_TRIMOVF(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00573" name="l00573"></a><span class="lineno">  573</span>{</div>
<div class="line"><a id="l00574" name="l00574"></a><span class="lineno">  574</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;ISR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaf3852f10eb46159b7888c71e6d9cec3b">CRS_ISR_TRIMOVF</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaf3852f10eb46159b7888c71e6d9cec3b">CRS_ISR_TRIMOVF</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00575" name="l00575"></a><span class="lineno">  575</span>}</div>
<div class="line"><a id="l00576" name="l00576"></a><span class="lineno">  576</span></div>
<div class="line"><a id="l00582" name="l00582"></a><span class="lineno">  582</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_ClearFlag_SYNCOK(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00583" name="l00583"></a><span class="lineno">  583</span>{</div>
<div class="line"><a id="l00584" name="l00584"></a><span class="lineno">  584</span>  WRITE_REG(CRS-&gt;ICR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaa42110e626aeef3ca9d76c8bda1f08d6">CRS_ICR_SYNCOKC</a>);</div>
<div class="line"><a id="l00585" name="l00585"></a><span class="lineno">  585</span>}</div>
<div class="line"><a id="l00586" name="l00586"></a><span class="lineno">  586</span></div>
<div class="line"><a id="l00592" name="l00592"></a><span class="lineno">  592</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_ClearFlag_SYNCWARN(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00593" name="l00593"></a><span class="lineno">  593</span>{</div>
<div class="line"><a id="l00594" name="l00594"></a><span class="lineno">  594</span>  WRITE_REG(CRS-&gt;ICR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gab772d21f8bc42ad5761a270d663be1ce">CRS_ICR_SYNCWARNC</a>);</div>
<div class="line"><a id="l00595" name="l00595"></a><span class="lineno">  595</span>}</div>
<div class="line"><a id="l00596" name="l00596"></a><span class="lineno">  596</span></div>
<div class="line"><a id="l00603" name="l00603"></a><span class="lineno">  603</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_ClearFlag_ERR(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00604" name="l00604"></a><span class="lineno">  604</span>{</div>
<div class="line"><a id="l00605" name="l00605"></a><span class="lineno">  605</span>  WRITE_REG(CRS-&gt;ICR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gae67dc4a9e576468b0c322902c7c47793">CRS_ICR_ERRC</a>);</div>
<div class="line"><a id="l00606" name="l00606"></a><span class="lineno">  606</span>}</div>
<div class="line"><a id="l00607" name="l00607"></a><span class="lineno">  607</span></div>
<div class="line"><a id="l00613" name="l00613"></a><span class="lineno">  613</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_ClearFlag_ESYNC(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00614" name="l00614"></a><span class="lineno">  614</span>{</div>
<div class="line"><a id="l00615" name="l00615"></a><span class="lineno">  615</span>  WRITE_REG(CRS-&gt;ICR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacfaa0b3004143ca5b1a7fe5ed23daccf">CRS_ICR_ESYNCC</a>);</div>
<div class="line"><a id="l00616" name="l00616"></a><span class="lineno">  616</span>}</div>
<div class="line"><a id="l00617" name="l00617"></a><span class="lineno">  617</span></div>
<div class="line"><a id="l00621" name="l00621"></a><span class="lineno">  621</span></div>
<div class="line"><a id="l00625" name="l00625"></a><span class="lineno">  625</span></div>
<div class="line"><a id="l00631" name="l00631"></a><span class="lineno">  631</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_EnableIT_SYNCOK(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00632" name="l00632"></a><span class="lineno">  632</span>{</div>
<div class="line"><a id="l00633" name="l00633"></a><span class="lineno">  633</span>  SET_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga246a4b3d840b5b9a18f6ea414fc48297">CRS_CR_SYNCOKIE</a>);</div>
<div class="line"><a id="l00634" name="l00634"></a><span class="lineno">  634</span>}</div>
<div class="line"><a id="l00635" name="l00635"></a><span class="lineno">  635</span></div>
<div class="line"><a id="l00641" name="l00641"></a><span class="lineno">  641</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_DisableIT_SYNCOK(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00642" name="l00642"></a><span class="lineno">  642</span>{</div>
<div class="line"><a id="l00643" name="l00643"></a><span class="lineno">  643</span>  CLEAR_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga246a4b3d840b5b9a18f6ea414fc48297">CRS_CR_SYNCOKIE</a>);</div>
<div class="line"><a id="l00644" name="l00644"></a><span class="lineno">  644</span>}</div>
<div class="line"><a id="l00645" name="l00645"></a><span class="lineno">  645</span></div>
<div class="line"><a id="l00651" name="l00651"></a><span class="lineno">  651</span>__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCOK(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00652" name="l00652"></a><span class="lineno">  652</span>{</div>
<div class="line"><a id="l00653" name="l00653"></a><span class="lineno">  653</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga246a4b3d840b5b9a18f6ea414fc48297">CRS_CR_SYNCOKIE</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga246a4b3d840b5b9a18f6ea414fc48297">CRS_CR_SYNCOKIE</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00654" name="l00654"></a><span class="lineno">  654</span>}</div>
<div class="line"><a id="l00655" name="l00655"></a><span class="lineno">  655</span></div>
<div class="line"><a id="l00661" name="l00661"></a><span class="lineno">  661</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_EnableIT_SYNCWARN(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00662" name="l00662"></a><span class="lineno">  662</span>{</div>
<div class="line"><a id="l00663" name="l00663"></a><span class="lineno">  663</span>  SET_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac27fb8e1741d3b5c19a527955eb00bad">CRS_CR_SYNCWARNIE</a>);</div>
<div class="line"><a id="l00664" name="l00664"></a><span class="lineno">  664</span>}</div>
<div class="line"><a id="l00665" name="l00665"></a><span class="lineno">  665</span></div>
<div class="line"><a id="l00671" name="l00671"></a><span class="lineno">  671</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_DisableIT_SYNCWARN(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00672" name="l00672"></a><span class="lineno">  672</span>{</div>
<div class="line"><a id="l00673" name="l00673"></a><span class="lineno">  673</span>  CLEAR_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac27fb8e1741d3b5c19a527955eb00bad">CRS_CR_SYNCWARNIE</a>);</div>
<div class="line"><a id="l00674" name="l00674"></a><span class="lineno">  674</span>}</div>
<div class="line"><a id="l00675" name="l00675"></a><span class="lineno">  675</span></div>
<div class="line"><a id="l00681" name="l00681"></a><span class="lineno">  681</span>__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCWARN(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00682" name="l00682"></a><span class="lineno">  682</span>{</div>
<div class="line"><a id="l00683" name="l00683"></a><span class="lineno">  683</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac27fb8e1741d3b5c19a527955eb00bad">CRS_CR_SYNCWARNIE</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac27fb8e1741d3b5c19a527955eb00bad">CRS_CR_SYNCWARNIE</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00684" name="l00684"></a><span class="lineno">  684</span>}</div>
<div class="line"><a id="l00685" name="l00685"></a><span class="lineno">  685</span></div>
<div class="line"><a id="l00691" name="l00691"></a><span class="lineno">  691</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_EnableIT_ERR(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00692" name="l00692"></a><span class="lineno">  692</span>{</div>
<div class="line"><a id="l00693" name="l00693"></a><span class="lineno">  693</span>  SET_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac616bbfe903ec7cc2be289db5fba0fe5">CRS_CR_ERRIE</a>);</div>
<div class="line"><a id="l00694" name="l00694"></a><span class="lineno">  694</span>}</div>
<div class="line"><a id="l00695" name="l00695"></a><span class="lineno">  695</span></div>
<div class="line"><a id="l00701" name="l00701"></a><span class="lineno">  701</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_DisableIT_ERR(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00702" name="l00702"></a><span class="lineno">  702</span>{</div>
<div class="line"><a id="l00703" name="l00703"></a><span class="lineno">  703</span>  CLEAR_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac616bbfe903ec7cc2be289db5fba0fe5">CRS_CR_ERRIE</a>);</div>
<div class="line"><a id="l00704" name="l00704"></a><span class="lineno">  704</span>}</div>
<div class="line"><a id="l00705" name="l00705"></a><span class="lineno">  705</span></div>
<div class="line"><a id="l00711" name="l00711"></a><span class="lineno">  711</span>__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ERR(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00712" name="l00712"></a><span class="lineno">  712</span>{</div>
<div class="line"><a id="l00713" name="l00713"></a><span class="lineno">  713</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac616bbfe903ec7cc2be289db5fba0fe5">CRS_CR_ERRIE</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac616bbfe903ec7cc2be289db5fba0fe5">CRS_CR_ERRIE</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00714" name="l00714"></a><span class="lineno">  714</span>}</div>
<div class="line"><a id="l00715" name="l00715"></a><span class="lineno">  715</span></div>
<div class="line"><a id="l00721" name="l00721"></a><span class="lineno">  721</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_EnableIT_ESYNC(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00722" name="l00722"></a><span class="lineno">  722</span>{</div>
<div class="line"><a id="l00723" name="l00723"></a><span class="lineno">  723</span>  SET_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga3831818c762e279f698faf27f4e7db4a">CRS_CR_ESYNCIE</a>);</div>
<div class="line"><a id="l00724" name="l00724"></a><span class="lineno">  724</span>}</div>
<div class="line"><a id="l00725" name="l00725"></a><span class="lineno">  725</span></div>
<div class="line"><a id="l00731" name="l00731"></a><span class="lineno">  731</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_CRS_DisableIT_ESYNC(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00732" name="l00732"></a><span class="lineno">  732</span>{</div>
<div class="line"><a id="l00733" name="l00733"></a><span class="lineno">  733</span>  CLEAR_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga3831818c762e279f698faf27f4e7db4a">CRS_CR_ESYNCIE</a>);</div>
<div class="line"><a id="l00734" name="l00734"></a><span class="lineno">  734</span>}</div>
<div class="line"><a id="l00735" name="l00735"></a><span class="lineno">  735</span></div>
<div class="line"><a id="l00741" name="l00741"></a><span class="lineno">  741</span>__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ESYNC(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00742" name="l00742"></a><span class="lineno">  742</span>{</div>
<div class="line"><a id="l00743" name="l00743"></a><span class="lineno">  743</span>  <span class="keywordflow">return</span> ((READ_BIT(CRS-&gt;CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga3831818c762e279f698faf27f4e7db4a">CRS_CR_ESYNCIE</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga3831818c762e279f698faf27f4e7db4a">CRS_CR_ESYNCIE</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00744" name="l00744"></a><span class="lineno">  744</span>}</div>
<div class="line"><a id="l00745" name="l00745"></a><span class="lineno">  745</span></div>
<div class="line"><a id="l00749" name="l00749"></a><span class="lineno">  749</span> </div>
<div class="line"><a id="l00750" name="l00750"></a><span class="lineno">  750</span><span class="preprocessor">#if defined(USE_FULL_LL_DRIVER)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00754" name="l00754"></a><span class="lineno">  754</span> </div>
<div class="line"><a id="l00755" name="l00755"></a><span class="lineno">  755</span>ErrorStatus LL_CRS_DeInit(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00756" name="l00756"></a><span class="lineno">  756</span></div>
<div class="line"><a id="l00760" name="l00760"></a><span class="lineno">  760</span><span class="preprocessor">#endif </span><span class="comment">/* USE_FULL_LL_DRIVER */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00761" name="l00761"></a><span class="lineno">  761</span></div>
<div class="line"><a id="l00765" name="l00765"></a><span class="lineno">  765</span></div>
<div class="line"><a id="l00769" name="l00769"></a><span class="lineno">  769</span> </div>
<div class="line"><a id="l00770" name="l00770"></a><span class="lineno">  770</span><span class="preprocessor">#endif </span><span class="comment">/* defined(CRS) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00771" name="l00771"></a><span class="lineno">  771</span></div>
<div class="line"><a id="l00775" name="l00775"></a><span class="lineno">  775</span> </div>
<div class="line"><a id="l00776" name="l00776"></a><span class="lineno">  776</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00777" name="l00777"></a><span class="lineno">  777</span>}</div>
<div class="line"><a id="l00778" name="l00778"></a><span class="lineno">  778</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00779" name="l00779"></a><span class="lineno">  779</span> </div>
<div class="line"><a id="l00780" name="l00780"></a><span class="lineno">  780</span><span class="preprocessor">#endif </span><span class="comment">/* STM32H7xx_LL_CRS_H */</span><span class="preprocessor"></span></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga0f33a79fec47400ab363bbf5b4b9f2b5"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga0f33a79fec47400ab363bbf5b4b9f2b5">CRS_ISR_SYNCWARNF</a></div><div class="ttdeci">#define CRS_ISR_SYNCWARNF</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5865</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga246a4b3d840b5b9a18f6ea414fc48297"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga246a4b3d840b5b9a18f6ea414fc48297">CRS_CR_SYNCOKIE</a></div><div class="ttdeci">#define CRS_CR_SYNCOKIE</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5811</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga3831818c762e279f698faf27f4e7db4a"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga3831818c762e279f698faf27f4e7db4a">CRS_CR_ESYNCIE</a></div><div class="ttdeci">#define CRS_CR_ESYNCIE</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5820</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga441881d5e657b04236e440918fe63d20"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga441881d5e657b04236e440918fe63d20">CRS_CFGR_SYNCSRC</a></div><div class="ttdeci">#define CRS_CFGR_SYNCSRC</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5851</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga48c70ae21b6a35ed520a2b30df2c4852"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga48c70ae21b6a35ed520a2b30df2c4852">CRS_CFGR_FELIM</a></div><div class="ttdeci">#define CRS_CFGR_FELIM</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5840</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga53d79706214ba4ee9310e4b678d67e44"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga53d79706214ba4ee9310e4b678d67e44">CRS_CR_SWSYNC</a></div><div class="ttdeci">#define CRS_CR_SWSYNC</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5829</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga755d695431db14c1b3b15a48ede61c13"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga755d695431db14c1b3b15a48ede61c13">CRS_CR_TRIM</a></div><div class="ttdeci">#define CRS_CR_TRIM</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5832</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga7e54b011ada0eeb4b6ed9cdd24d517f9"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga7e54b011ada0eeb4b6ed9cdd24d517f9">CRS_CFGR_RELOAD</a></div><div class="ttdeci">#define CRS_CFGR_RELOAD</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5837</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga80d05ae1142788a65444c0463a26bcfb"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga80d05ae1142788a65444c0463a26bcfb">CRS_ISR_SYNCERR</a></div><div class="ttdeci">#define CRS_ISR_SYNCERR</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5874</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga819c4d424be7915f9660ecb19c234a8f"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga819c4d424be7915f9660ecb19c234a8f">CRS_ISR_ESYNCF</a></div><div class="ttdeci">#define CRS_ISR_ESYNCF</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5871</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga91196b059d8ff52c4f28bc964c8a446a"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga91196b059d8ff52c4f28bc964c8a446a">CRS_ISR_FEDIR</a></div><div class="ttdeci">#define CRS_ISR_FEDIR</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5883</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga963b451a4ca8890ee3d323304f0b9298"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga963b451a4ca8890ee3d323304f0b9298">CRS_ISR_ERRF</a></div><div class="ttdeci">#define CRS_ISR_ERRF</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5868</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga9f2241bd51b436f7b381ad410124aec5"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga9f2241bd51b436f7b381ad410124aec5">CRS_ISR_SYNCMISS</a></div><div class="ttdeci">#define CRS_ISR_SYNCMISS</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5877</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gaa42110e626aeef3ca9d76c8bda1f08d6"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gaa42110e626aeef3ca9d76c8bda1f08d6">CRS_ICR_SYNCOKC</a></div><div class="ttdeci">#define CRS_ICR_SYNCOKC</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5891</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gab28395cefb0927f2118a9a840a2e2d71"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gab28395cefb0927f2118a9a840a2e2d71">CRS_CFGR_SYNCPOL</a></div><div class="ttdeci">#define CRS_CFGR_SYNCPOL</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5857</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gab772d21f8bc42ad5761a270d663be1ce"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gab772d21f8bc42ad5761a270d663be1ce">CRS_ICR_SYNCWARNC</a></div><div class="ttdeci">#define CRS_ICR_SYNCWARNC</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5894</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gac27fb8e1741d3b5c19a527955eb00bad"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gac27fb8e1741d3b5c19a527955eb00bad">CRS_CR_SYNCWARNIE</a></div><div class="ttdeci">#define CRS_CR_SYNCWARNIE</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5814</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gac616bbfe903ec7cc2be289db5fba0fe5"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gac616bbfe903ec7cc2be289db5fba0fe5">CRS_CR_ERRIE</a></div><div class="ttdeci">#define CRS_CR_ERRIE</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5817</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gace21476d647129c935f84daf84d91699"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gace21476d647129c935f84daf84d91699">CRS_CR_CEN</a></div><div class="ttdeci">#define CRS_CR_CEN</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5823</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gacfaa0b3004143ca5b1a7fe5ed23daccf"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gacfaa0b3004143ca5b1a7fe5ed23daccf">CRS_ICR_ESYNCC</a></div><div class="ttdeci">#define CRS_ICR_ESYNCC</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5900</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gad0b3ee2ab042802997e57d788c640647"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gad0b3ee2ab042802997e57d788c640647">CRS_CFGR_SYNCDIV</a></div><div class="ttdeci">#define CRS_CFGR_SYNCDIV</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5844</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gae0a9b5f8992ead0ad76fbb08a5e32419"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gae0a9b5f8992ead0ad76fbb08a5e32419">CRS_ISR_SYNCOKF</a></div><div class="ttdeci">#define CRS_ISR_SYNCOKF</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5862</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gae67dc4a9e576468b0c322902c7c47793"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gae67dc4a9e576468b0c322902c7c47793">CRS_ICR_ERRC</a></div><div class="ttdeci">#define CRS_ICR_ERRC</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5897</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gaf0b8a9757678f28814b1a0c1baca63e2"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gaf0b8a9757678f28814b1a0c1baca63e2">CRS_ISR_FECAP</a></div><div class="ttdeci">#define CRS_ISR_FECAP</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5886</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gaf3852f10eb46159b7888c71e6d9cec3b"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gaf3852f10eb46159b7888c71e6d9cec3b">CRS_ISR_TRIMOVF</a></div><div class="ttdeci">#define CRS_ISR_TRIMOVF</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5880</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gafa48432b942f1896e05a2eff91178edd"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gafa48432b942f1896e05a2eff91178edd">CRS_CR_AUTOTRIMEN</a></div><div class="ttdeci">#define CRS_CR_AUTOTRIMEN</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:5826</div></div>
<div class="ttc" id="astm32h7xx_8h_html"><div class="ttname"><a href="stm32h7xx_8h.html">stm32h7xx.h</a></div><div class="ttdoc">CMSIS STM32H7xx Device Peripheral Access Layer Header File.</div></div>
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